Yichang Hu

About Me

I am Yichang Hu, currently a Ph.D. student from Department of Computer Science, University of North Carolina at Chapel Hill (UNC-CH), under the supervision of Prof. Andrew Kwong. Prior to pursuing Ph.D. degree, I obtained my Master’s degree from South China University of Technology, advised by Prof. Lu Lu.

Research Interests

• Hardware Security: side-channel attack and defense, micro-architectural security
• Computation: GPU-based parallel computing, heterogenous systems

Project

Cross-Component Rowhammer Attacks from Modern GPUs

• Developed advanced techniques for Rowhammering Ampere A6000 GPU memory that yield dramatically more bit flips than prior work.
• A comprehensive characterization of the Rowhammer vulnerability on a large number of GPUs.
• End-to-end exploit wherein an unprivileged CUDA kernel leverages a bit flip on the GPU's memory to gain complete control over the host system.

Optimize High Performance LINPACK Benchmark on AMD GPUs

• Migrated HPL Benchmark to AMD GPUs for acceleration.
• High performance by incorporating pipeline, event-driven paradigm, and multi-threads strategy.
• Approximately 95% computing efficiency for one node and 2.5e+4 Tflops for 256 nodes on LUMI.

Memory-Accelerated Parallel Method for FFT on GPU

• Designed double-precision FFT library with different dimensions and radices on GPU.
• Achieved optimization by implementing optimized GPU read/write. strategy, dynamic generation of kernel and reduction of communication scale.
• Designed Large-Scale Distributed FFT Framework on GPUs and achieved 2x speedup over heFFTe (currently available state-of-art distributed FFT library).

A Batched Matrix Multiplication Framework for GPUs

• Proposed a vbatch routine to calculate batched GEMM with variable size on GPU.
• Reduced the GPU idle time under unbalanced matrix input.
• Achieved a 3.02× performance improvement compared to the latest MAGMA implementation.

A Simulation Model for High Performance LINPACK

• Simulated large-scale HPL computing processes and designed the simulation model.
• Realized rapid output of heterogeneous systems or computing power, thus providing performance references for next-generation architecture design.

Publications

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